1. Field of the Invention
The present invention generally relates to integrated circuit (IC) devices and, more specifically, to methods and systems to prevent unauthorized access to internal registers of IC devices.
2. Description of the Related Art
Many integrated circuit (IC) devices, such as systems on a chip (SOCs) and other type very large scale integrated (VLSI) devices include interfaces that provide access to internal registers, allowing the devices to be tested during the manufacturing process in an efficient manner. Examples of such interfaces include level-sensitive scan design (LSSD) scan chains and the JTAG interface, named after the Joint Test Action Group committee that established the test access port (TAP) and boundary-scan architecture defined in IEEE Standard 1149. Testing algorithms that utilize such interfaces to modify and examine the internal workings of the device by reading/writing the device's internal registers are well known.
Unfortunately, however, these same interfaces may also provide an interface or “backdoor” for a hardware hacker to gain access to the device. This may not be a problem for many devices on the market, since there may be little economic or emotional gain to breaking into those chips. For other devices, however, such as those used in video game consoles, satellite decoders, and the like, there may be more to gain. In such systems, encryption is often employed to protect proprietary data (e.g., copyrighted game data or subscriber-only media signals). Providing access to internal registers via an LSSD or JTAG interface may allow a hacker to interrogate and/or modify such data in its unencrypted form, thus bypassing security.
One solution to prevent unauthorized access to internal registers would be to disable the interface, for example, by blowing a fuse on the chip after the manufacturing tests are complete. This would certainly prevent subsequent internal register access by a hardware hacker via the interface. However, a problem with this approach is that permanently disabling the interface after manufacturing would also prevent testing (e.g., failure analysis) of field failures that come back to the manufacturer.
Accordingly, there is a need for methods and apparatus for preventing unauthorized access to internal registers while still allowing authorized access to those same internal registers.